Показано материалов: 1-10
Memory management. Paging and segmentation 12.3.4.2 explain principle of memory organization by segment and page |
Addressing modes
12.3.4.1 explain the principle of memory addressing |
CISC vs RISC 12.3.2.1 describe the RISC architecture 12.3.2.2 describe the CISC architecture 12.3.2.3 compare RISC and CISC |
Computer performance
12.3.2.6 explain how the clock speed, word length and bus width affect the performance |
System bus (extended)
12.3.2.4 explain how data is transferred between different components of a computer system through the address bus, data bus and control bus 12.3.2.6 explain how the clock speed, word length and bus width affect the performance |
Fetch-Decode-Execute cycle
12.3.2.5 explain three operations in fetch-execute cycle (fetch /decode /execute) |
Hardware & software requirements
11.2.2.7 define minimum requirements for hardware when implementing solutions 11.3.1.5 justify their choice of applied software and choice criteria based on the goals |
System bus
LO: 11.3.2.2 describe the purpose of CPU components, system bus and main memory
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Von Neumann architecture Memory and the stored program concept Central Processing Unit (CPU) LO: 11.3.2.1 describe the interaction of CPU with peripheral devices LO: 11.3.2.2 describe the purpose of CPU components, system bus and main memory |
11.1.3.5 evaluate risks of using cloud technologies |